donghyeon.kang/document-haness
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

refactor: 문서 개선 중

Browse Source
This commit is contained in:
donghyeon-ka
2026-09-21 14:30:55 +09:00
parent c93cdea150
commit 805a18f486
1497 changed files with 525837 additions and 59152 deletions
Download Patch File Download Diff File Expand all files Collapse all files
docs/virtualization/final/assets/diagrams/numa-vcpu-and-memory-placement/numa-vcpu-and-memory-placement.alt.md
+10 -10
View File
@@ -10,16 +10,16 @@ QEMU vCPU Thread, VM1 Memory Backing, Node 0 CPU, Node 0 RAM, Node 1 RAM 다섯
## Elements and evidence
- **QEMU vCPU Thread** (process): Guest vCPU 가 Host 에서 갖는 실체. Host scheduler 가 이것을 logical CPU 에 올린다. Evidence: L3315–L3324.
- **VM1 Memory Backing** (memory): 그 가상 머신의 Host physical backing page 가 놓이는 자리. Evidence: L3327–L3327, L3352–L3354, L3381–L3382.
- **Node 0 CPU** (compute): vCPU thread 가 실행되는 logical CPU. NUMA Node 0 에 속한다. Evidence: L3322–L3330.
- **Node 0 RAM** (memory): Node 0 CPU 와 같은 node 의 RAM. Evidence: L3288–L3296, L3373–L3382.
- **Node 1 RAM** (memory): 다른 node 의 RAM. Node 0 CPU 가 읽으면 interconnect 를 건넌다. Evidence: L3299–L3306, L3334–L3334.
- **QEMU vCPU Thread** (process): Guest vCPU 가 Host 에서 갖는 실체. Host scheduler 가 이것을 logical CPU 에 올린다. Evidence: L3328–L3337.
- **VM1 Memory Backing** (memory): 그 가상 머신의 Host physical backing page 가 놓이는 자리. Evidence: L3340–L3340, L3365–L3367, L3394–L3395.
- **Node 0 CPU** (compute): vCPU thread 가 실행되는 logical CPU. NUMA Node 0 에 속한다. Evidence: L3335–L3343.
- **Node 0 RAM** (memory): Node 0 CPU 와 같은 node 의 RAM. Evidence: L3301–L3309, L3386–L3395.
- **Node 1 RAM** (memory): 다른 node 의 RAM. Node 0 CPU 가 읽으면 interconnect 를 건넌다. Evidence: L3312–L3319, L3347–L3347.
## Relationships
- **QEMU vCPU Thread → Node 0 CPU:** vCPU Pinning. Evidence: L3322–L3324, L3347–L3350.
- **VM1 Memory Backing → Node 1 RAM:** Memory Placement. Evidence: L3327–L3327, L3352–L3354.
- **Node 0 CPU → Node 1 RAM:** Remote Access. Evidence: L3329–L3339, L3356–L3357.
- **VM1 Memory Backing → Node 0 RAM:** Memory Binding. Evidence: L3361–L3366, L3381–L3382.
- **Node 0 CPU → Node 0 RAM:** Local Access. Evidence: L3288–L3296, L3373–L3382.
- **QEMU vCPU Thread → Node 0 CPU:** vCPU Pinning. Evidence: L3335–L3337, L3360–L3363.
- **VM1 Memory Backing → Node 1 RAM:** Memory Placement. Evidence: L3340–L3340, L3365–L3367.
- **Node 0 CPU → Node 1 RAM:** Remote Access. Evidence: L3342–L3352, L3369–L3370.
- **VM1 Memory Backing → Node 0 RAM:** Memory Binding. Evidence: L3374–L3379, L3394–L3395.
- **Node 0 CPU → Node 0 RAM:** Local Access. Evidence: L3301–L3309, L3386–L3395.
docs/virtualization/final/assets/diagrams/numa-vcpu-and-memory-placement/numa-vcpu-and-memory-placement.dot
+15
View File
@@ -0,0 +1,15 @@
digraph techviz {
graph [rankdir=LR, splines=ortho, nodesep=0.55, ranksep=0.85];
node [fontname=Helvetica, fontsize=11, margin="0.18,0.12", style="rounded,filled", fillcolor=white, color="#2d4357", penwidth=1.5];
edge [fontname=Helvetica, fontsize=10, color="#364b5f", penwidth=1.4, arrowsize=0.75];
n0 [label="QEMU vCPU Thread", shape=box, style="rounded,filled"];
n1 [label="VM1 Memory Backing", shape=box, style="rounded,filled"];
n2 [label="Node 0 CPU", shape=box, style="rounded,filled"];
n3 [label="Node 0 RAM", shape=box, style="rounded,filled"];
n4 [label="Node 1 RAM", shape=box, style="rounded,filled"];
n0 -> n2 [label="vCPU Pinning", style=solid];
n1 -> n4 [label="Memory Placement", style=solid];
n2 -> n4 [label="Remote Access", style=solid];
n1 -> n3 [label="Memory Binding", style=solid];
n2 -> n3 [label="Local Access", style=solid];
}
docs/virtualization/final/assets/diagrams/numa-vcpu-and-memory-placement/numa-vcpu-and-memory-placement.drawio
+5 -5
View File
@@ -5,19 +5,19 @@
<root>
<mxCell id="0"/>
<mxCell id="1" parent="0"/>
<mxCell id="n_qemu-vcpu-thread" value="QEMU vCPU Thread&lt;br/&gt;Guest vCPU" tooltip="Guest vCPU 가 Host 에서 갖는 실체. Host scheduler 가 이것을 logical CPU 에 올린다. | Evidence: L3315-L3324" style="whiteSpace=wrap;html=1;rounded=1;strokeWidth=2;fontSize=14;fontStyle=1;fillColor=#ffffff;strokeColor=#2d4357;verticalAlign=middle;strokeColor=#2563eb;strokeWidth=2;" vertex="1" parent="1">
<mxCell id="n_qemu-vcpu-thread" value="QEMU vCPU Thread&lt;br/&gt;Guest vCPU" tooltip="Guest vCPU 가 Host 에서 갖는 실체. Host scheduler 가 이것을 logical CPU 에 올린다. | Evidence: L3328-L3337" style="whiteSpace=wrap;html=1;rounded=1;strokeWidth=2;fontSize=14;fontStyle=1;fillColor=#ffffff;strokeColor=#2d4357;verticalAlign=middle;strokeColor=#2563eb;strokeWidth=2;" vertex="1" parent="1">
<mxGeometry x="45.0" y="35.0" width="150.0" height="71.0" as="geometry"/>
</mxCell>
<mxCell id="n_vm-memory-backing" value="VM1 Memory Backing&lt;br/&gt;VM1 RAM" tooltip="그 가상 머신의 Host physical backing page 가 놓이는 자리. | Evidence: L3327-L3327, L3352-L3354, L3381-L3382" style="whiteSpace=wrap;html=1;rounded=1;strokeWidth=2;fontSize=14;fontStyle=1;fillColor=#ffffff;strokeColor=#2d4357;verticalAlign=middle;" vertex="1" parent="1">
<mxCell id="n_vm-memory-backing" value="VM1 Memory Backing&lt;br/&gt;VM1 RAM" tooltip="그 가상 머신의 Host physical backing page 가 놓이는 자리. | Evidence: L3340-L3340, L3365-L3367, L3394-L3395" style="whiteSpace=wrap;html=1;rounded=1;strokeWidth=2;fontSize=14;fontStyle=1;fillColor=#ffffff;strokeColor=#2d4357;verticalAlign=middle;" vertex="1" parent="1">
<mxGeometry x="255.0" y="35.0" width="160.0" height="71.0" as="geometry"/>
</mxCell>
<mxCell id="n_node0-cpu" value="Node 0 CPU&lt;br/&gt;Host Logical CPU" tooltip="vCPU thread 가 실행되는 logical CPU. NUMA Node 0 에 속한다. | Evidence: L3322-L3330" style="whiteSpace=wrap;html=1;rounded=1;strokeWidth=2;fontSize=14;fontStyle=1;fillColor=#ffffff;strokeColor=#2d4357;verticalAlign=middle;strokeColor=#2563eb;strokeWidth=2;" vertex="1" parent="1">
<mxCell id="n_node0-cpu" value="Node 0 CPU&lt;br/&gt;Host Logical CPU" tooltip="vCPU thread 가 실행되는 logical CPU. NUMA Node 0 에 속한다. | Evidence: L3335-L3343" style="whiteSpace=wrap;html=1;rounded=1;strokeWidth=2;fontSize=14;fontStyle=1;fillColor=#ffffff;strokeColor=#2d4357;verticalAlign=middle;strokeColor=#2563eb;strokeWidth=2;" vertex="1" parent="1">
<mxGeometry x="465.0" y="35.0" width="150.0" height="71.0" as="geometry"/>
</mxCell>
<mxCell id="n_node0-ram" value="Node 0 RAM&lt;br/&gt;Local Memory" tooltip="Node 0 CPU 와 같은 node 의 RAM. | Evidence: L3288-L3296, L3373-L3382" style="whiteSpace=wrap;html=1;rounded=1;strokeWidth=2;fontSize=14;fontStyle=1;fillColor=#ffffff;strokeColor=#2d4357;verticalAlign=middle;" vertex="1" parent="1">
<mxCell id="n_node0-ram" value="Node 0 RAM&lt;br/&gt;Local Memory" tooltip="Node 0 CPU 와 같은 node 의 RAM. | Evidence: L3301-L3309, L3386-L3395" style="whiteSpace=wrap;html=1;rounded=1;strokeWidth=2;fontSize=14;fontStyle=1;fillColor=#ffffff;strokeColor=#2d4357;verticalAlign=middle;" vertex="1" parent="1">
<mxGeometry x="675.0" y="35.0" width="150.0" height="71.0" as="geometry"/>
</mxCell>
<mxCell id="n_node1-ram" value="Node 1 RAM&lt;br/&gt;Remote Memory" tooltip="다른 node 의 RAM. Node 0 CPU 가 읽으면 interconnect 를 건넌다. | Evidence: L3299-L3306, L3334-L3334" style="whiteSpace=wrap;html=1;rounded=1;strokeWidth=2;fontSize=14;fontStyle=1;fillColor=#ffffff;strokeColor=#2d4357;verticalAlign=middle;" vertex="1" parent="1">
<mxCell id="n_node1-ram" value="Node 1 RAM&lt;br/&gt;Remote Memory" tooltip="다른 node 의 RAM. Node 0 CPU 가 읽으면 interconnect 를 건넌다. | Evidence: L3312-L3319, L3347-L3347" style="whiteSpace=wrap;html=1;rounded=1;strokeWidth=2;fontSize=14;fontStyle=1;fillColor=#ffffff;strokeColor=#2d4357;verticalAlign=middle;" vertex="1" parent="1">
<mxGeometry x="885.0" y="35.0" width="150.0" height="71.0" as="geometry"/>
</mxCell>
<mxCell id="e_vcpu-pinning" value="vCPU Pinning" style="edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;strokeWidth=2;endArrow=block;endFill=1;" edge="1" parent="1" source="n_qemu-vcpu-thread" target="n_node0-cpu">
docs/virtualization/final/assets/diagrams/numa-vcpu-and-memory-placement/numa-vcpu-and-memory-placement.manifest.json
+16 -5
View File
@@ -2,21 +2,22 @@
"harness_version": "0.2.0",
"spec_id": "numa-vcpu-and-memory-placement",
"spec_version": "1.1",
"spec_sha256": "afeb9cbc8d7063a1945cabb916eadab7d248a252fce57e433355e6c679090bd5",
"spec_sha256": "49d394cecc2f97b5dd1c569cc040275a11abb76b563dda8edde59f497d21c7d9",
"source_context": {
"document": "docs/virtualization/final/document.md",
"document_sha256": "181e2b3cc8a45bae81e7e8193d026937c4d586ae4495d3b2c323eb7e6abcfadd",
"document_sha256": "8c4ecc64c8cea9a4450ed7131fdd9cb2048dc092b66cd969f6346ed77887c210",
"anchor": {
"kind": "heading",
"value": "75. vCPU와 NUMA의 연결",
"line": 3313
"line": 3326
}
},
"outputs": [
"numa-vcpu-and-memory-placement.svg",
"numa-vcpu-and-memory-placement.drawio",
"numa-vcpu-and-memory-placement.mmd",
"numa-vcpu-and-memory-placement.d2",
"numa-vcpu-and-memory-placement.dot",
"numa-vcpu-and-memory-placement.drawio",
"numa-vcpu-and-memory-placement.excalidraw",
"numa-vcpu-and-memory-placement.alt.md"
],
@@ -27,5 +28,15 @@
"reference_ids": [
"payment-approval-sequence"
],
"diagram_only": true
"diagram_only": true,
"source_spec_file_sha256": "1db7bff99e8493c392fb04c43ee74f13b4bcf0c0d2685f036bcdd74bbd6c00c4",
"output_sha256": {
"numa-vcpu-and-memory-placement.svg": "3720f7bf05faaf6e542fd41cb08d62afad368a2aa55ee6d960a1372b0d766da2",
"numa-vcpu-and-memory-placement.mmd": "5b1860bb9a59f0f7848a7789e8ccd0c8471b5560113bbf44c09a9d1672494bc0",
"numa-vcpu-and-memory-placement.d2": "a061122778afc79df6d07608d99ca98f625e73411a8dceeba163cd2315a3b215",
"numa-vcpu-and-memory-placement.dot": "63025126420fadbf9ddf5686ff7e07aab5ec7cd226349d812d36fb47046f2e0f",
"numa-vcpu-and-memory-placement.drawio": "24c0328f9bba296c4bdeed687a72d80789d893d3c4d803567d10611f84057059",
"numa-vcpu-and-memory-placement.excalidraw": "c8115da91d5a884bb8d256b01477ec548ece6db09fc1c3ac58a609d9ab9b0834",
"numa-vcpu-and-memory-placement.alt.md": "a8db12c5add65f655d32a0f5bb00b01c6c873503ca57b52ff4814f215dd8afdb"
}
}
docs/virtualization/final/assets/diagrams/numa-vcpu-and-memory-placement/numa-vcpu-and-memory-placement.svg
+11 -11
View File
@@ -2,7 +2,7 @@
<svg xmlns="http://www.w3.org/2000/svg" width="1080" height="480" viewBox="0 0 1080 480" role="img" aria-labelledby="diagram-title diagram-description">
<title id="diagram-title">vCPU 를 Node 0 에 묶어도 backing 이 Node 1 에 있으면 접근은 remote 로 남는다</title>
<desc id="diagram-description">참여자는 왼쪽부터 QEMU vCPU Thread, VM1 Memory Backing, Node 0 CPU, Node 0 RAM, Node 1 RAM 다섯이다. 메시지는 위에서 아래로 읽는다. 1번에서 vCPU thread 가 Node 0 CPU 에 pinning 되고, 2번에서 VM1 의 memory backing 이 Node 1 에 놓인다. 그 배치에서 3번의 memory 접근은 Node 1 RAM 으로 가고 이것이 remote access 다. Node 0 과 Node 1 사이에는 interconnect 가 있어 이 접근만 그 구간을 건넌다. 4번과 5번은 그 뒤에 일어나는 다른 사건이 아니라 배치를 고친 구성이다. memory placement 와 binding 까지 Node 0 으로 맞추면 같은 접근이 Node 0 RAM 으로 가고 local access 가 된다. 접근 비용이 실제로 얼마나 차이 나는지, 이 Host 가 몇 개의 node 를 가졌는지는 그림이 말하지 않는다.</desc>
<metadata>{&quot;techviz&quot;:{&quot;spec_version&quot;:&quot;1.1&quot;,&quot;id&quot;:&quot;numa-vcpu-and-memory-placement&quot;,&quot;profile&quot;:&quot;sequence&quot;},&quot;source_context&quot;:{&quot;document&quot;:&quot;docs/virtualization/final/document.md&quot;,&quot;document_sha256&quot;:&quot;181e2b3cc8a45bae81e7e8193d026937c4d586ae4495d3b2c323eb7e6abcfadd&quot;,&quot;anchor&quot;:{&quot;kind&quot;:&quot;heading&quot;,&quot;value&quot;:&quot;75. vCPU와 NUMA의 연결&quot;,&quot;line&quot;:3313}},&quot;evidence_policy&quot;:&quot;Each factual element cites source lines or is marked assumption.&quot;,&quot;diagram_only&quot;:true}</metadata>
<metadata>{&quot;techviz&quot;:{&quot;spec_version&quot;:&quot;1.1&quot;,&quot;id&quot;:&quot;numa-vcpu-and-memory-placement&quot;,&quot;profile&quot;:&quot;sequence&quot;},&quot;source_context&quot;:{&quot;document&quot;:&quot;docs/virtualization/final/document.md&quot;,&quot;document_sha256&quot;:&quot;8c4ecc64c8cea9a4450ed7131fdd9cb2048dc092b66cd969f6346ed77887c210&quot;,&quot;anchor&quot;:{&quot;kind&quot;:&quot;heading&quot;,&quot;value&quot;:&quot;75. vCPU와 NUMA의 연결&quot;,&quot;line&quot;:3326}},&quot;evidence_policy&quot;:&quot;Each factual element cites source lines or is marked assumption.&quot;,&quot;diagram_only&quot;:true}</metadata>
<defs>
<marker id="arrow" viewBox="0 0 10 10" refX="9" refY="5" markerWidth="7" markerHeight="7" orient="auto-start-reverse">
<path d="M 0 0 L 10 5 L 0 10 z" />
@@ -50,44 +50,44 @@
</style>
</defs>
<rect class="canvas" width="1080" height="480" />
<rect class="node-shape kind-process emphasis-primary role-participant" data-evidence="3315-3324" x="45.0" y="35.0" width="150.0" height="71.0" rx="7" />
<rect class="node-shape kind-process emphasis-primary role-participant" data-evidence="3328-3337" x="45.0" y="35.0" width="150.0" height="71.0" rx="7" />
<text class="node-label" x="120.0" y="62.0">QEMU vCPU Thread</text>
<line class="node-detail-divider" x1="59.0" y1="83.0" x2="181.0" y2="83.0" />
<text class="node-detail" x="61.0" y="100.0">Guest vCPU</text>
<line class="lifeline" x1="120.0" y1="106.0" x2="120.0" y2="450.0" />
<rect class="node-shape kind-memory emphasis-normal role-participant" data-evidence="3327-3327,3352-3354,3381-3382" x="255.0" y="35.0" width="160.0" height="71.0" rx="7" />
<rect class="node-shape kind-memory emphasis-normal role-participant" data-evidence="3340-3340,3365-3367,3394-3395" x="255.0" y="35.0" width="160.0" height="71.0" rx="7" />
<text class="node-label" x="335.0" y="62.0">VM1 Memory Backing</text>
<line class="node-detail-divider" x1="269.0" y1="83.0" x2="401.0" y2="83.0" />
<text class="node-detail" x="271.0" y="100.0">VM1 RAM</text>
<line class="lifeline" x1="335.0" y1="106.0" x2="335.0" y2="450.0" />
<rect class="node-shape kind-compute emphasis-primary role-participant" data-evidence="3322-3330" x="465.0" y="35.0" width="150.0" height="71.0" rx="7" />
<rect class="node-shape kind-compute emphasis-primary role-participant" data-evidence="3335-3343" x="465.0" y="35.0" width="150.0" height="71.0" rx="7" />
<text class="node-label" x="540.0" y="62.0">Node 0 CPU</text>
<line class="node-detail-divider" x1="479.0" y1="83.0" x2="601.0" y2="83.0" />
<text class="node-detail" x="481.0" y="100.0">Host Logical CPU</text>
<line class="lifeline" x1="540.0" y1="106.0" x2="540.0" y2="450.0" />
<rect class="node-shape kind-memory emphasis-normal role-participant" data-evidence="3288-3296,3373-3382" x="675.0" y="35.0" width="150.0" height="71.0" rx="7" />
<rect class="node-shape kind-memory emphasis-normal role-participant" data-evidence="3301-3309,3386-3395" x="675.0" y="35.0" width="150.0" height="71.0" rx="7" />
<text class="node-label" x="750.0" y="62.0">Node 0 RAM</text>
<line class="node-detail-divider" x1="689.0" y1="83.0" x2="811.0" y2="83.0" />
<text class="node-detail" x="691.0" y="100.0">Local Memory</text>
<line class="lifeline" x1="750.0" y1="106.0" x2="750.0" y2="450.0" />
<rect class="node-shape kind-memory emphasis-normal role-participant" data-evidence="3299-3306,3334-3334" x="885.0" y="35.0" width="150.0" height="71.0" rx="7" />
<rect class="node-shape kind-memory emphasis-normal role-participant" data-evidence="3312-3319,3347-3347" x="885.0" y="35.0" width="150.0" height="71.0" rx="7" />
<text class="node-label" x="960.0" y="62.0">Node 1 RAM</text>
<line class="node-detail-divider" x1="899.0" y1="83.0" x2="1021.0" y2="83.0" />
<text class="node-detail" x="901.0" y="100.0">Remote Memory</text>
<line class="lifeline" x1="960.0" y1="106.0" x2="960.0" y2="450.0" />
<polyline class="edge kind-control style-solid emphasis-normal" points="120.0,140.0 540.0,140.0" data-evidence="3322-3324,3347-3350" />
<polyline class="edge kind-control style-solid emphasis-normal" points="120.0,140.0 540.0,140.0" data-evidence="3335-3337,3360-3363" />
<rect class="edge-label-bg" x="270.8" y="114.0" width="118.5" height="22" rx="3" />
<text class="edge-label" x="330.0" y="129.0">1. vCPU Pinning</text>
<polyline class="edge kind-control style-solid emphasis-normal" points="335.0,202.0 960.0,202.0" data-evidence="3327-3327,3352-3354" />
<polyline class="edge kind-control style-solid emphasis-normal" points="335.0,202.0 960.0,202.0" data-evidence="3340-3340,3365-3367" />
<rect class="edge-label-bg" x="574.9" y="176.0" width="145.3" height="22" rx="3" />
<text class="edge-label" x="647.5" y="191.0">2. Memory Placement</text>
<polyline class="edge kind-read style-dashed emphasis-normal" points="540.0,264.0 960.0,264.0" data-evidence="3329-3339,3356-3357" />
<polyline class="edge kind-read style-dashed emphasis-normal" points="540.0,264.0 960.0,264.0" data-evidence="3342-3352,3369-3370" />
<rect class="edge-label-bg" x="687.4" y="238.0" width="125.2" height="22" rx="3" />
<text class="edge-label" x="750.0" y="253.0">3. Remote Access</text>
<polyline class="edge kind-control style-solid emphasis-normal" points="335.0,326.0 750.0,326.0" data-evidence="3361-3366,3381-3382" />
<polyline class="edge kind-control style-solid emphasis-normal" points="335.0,326.0 750.0,326.0" data-evidence="3374-3379,3394-3395" />
<rect class="edge-label-bg" x="476.6" y="300.0" width="131.9" height="22" rx="3" />
<text class="edge-label" x="542.5" y="315.0">4. Memory Binding</text>
<polyline class="edge kind-read style-solid emphasis-normal" points="540.0,388.0 750.0,388.0" data-evidence="3288-3296,3373-3382" />
<polyline class="edge kind-read style-solid emphasis-normal" points="540.0,388.0 750.0,388.0" data-evidence="3301-3309,3386-3395" />
<rect class="edge-label-bg" x="585.8" y="362.0" width="118.5" height="22" rx="3" />
<text class="edge-label" x="645.0" y="377.0">5. Local Access</text>
</svg>
Side by Side Swipe Overlay

Before

Width:  |  Height:  |  Size: 8.4 KiB

After

Width:  |  Height:  |  Size: 8.4 KiB